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74LVT2245 * 74LVTH2245 Low Voltage Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs and 25: Series Resistors in the B Port Outputs
November 1999 Revised March 2005
74LVT2245 * 74LVTH2245 Low Voltage Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs and 25: Series Resistors in the B Port Outputs
General Description
The LVT2245 and LVTH2245 contain eight non-inverting bidirectional buffers with 3-STATE outputs and are intended for bus-oriented applications. The Transmit/ Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (activeHIGH) enables data from A Ports to B Ports; Receive (active-LOW) enables data from B Ports to A Ports. The Output Enable input, when HIGH, disables both A and B Ports by placing them in a high impedance state. The equivalent 25:-series resistor in the B Port helps reduce output overshoot and undershoot. The LVTH2245 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. These transceivers are designed for low voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT2245 and LVTH2245 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation.
Features
s Input and output interface capability to systems at 5V VCC s Equivalent 25: series resistor on B Port outputs s Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs (74LVTH2245), also available without bushold feature (74LVT2245) s Live insertion/extraction permitted s Power Up/Down high impedance provides glitch-free bus loading s Outputs source/sink 12 mA/12 mA on B Port, 32 mA/64 mA on A Port s Latch-up performance exceeds 500 mA s ESD performance:
Human-body model ! 2000V Machine model ! 200V Charged-device model ! 1000V
Ordering Code:
Order Number 74LVT2245WM 74LVT2245SJ 74LVT2245MSA 74LVT2245MTC 74LVT2245MTCX_NL (Note 1) 74LVTH2245WM 74LVTH2245SJ 74LVTH2245MSA 74LVTH2245MTC 74LVTH2245MTCX_NL (Note 1) Package Number M20B M20D MSA20 MTC20 MTC20 M20B M20D MSA20 MTC20 MTC20 Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: "_NL" indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
(c) 2005 Fairchild Semiconductor Corporation
DS012173
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74LVT2245 * 74LVTH2245
Logic Symbols
IEEE/IEC
Pin Descriptions
Pin Names OE T/R A0-A7 B0-B7 Description Output Enable Input Transmit/Receive Input Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs
Truth Table
Inputs Outputs OE L L H
H HIGH Voltage Level L LOW Voltage Level X Immaterial
T/R L H X Bus B Data to Bus A Bus A Data to Bus B HIGH-Z State
Connection Diagram
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74LVT2245 * 74LVTH2245
Absolute Maximum Ratings(Note 2)
Symbol VCC VI VO IIK IOK IO ICC IGND TSTG Parameter Supply Voltage DC Input Voltage Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current DC Supply Current per Supply Pin DC Ground Current per Ground Pin Storage Temperature Value Conditions Units V V Output in 3-STATE Output in HIGH or LOW State (Note 3) VI GND VO GND VO ! VCC Output at HIGH State VO ! VCC Output at LOW State V mA mA mA mA mA
0.5 to 4.6 0.5 to 7.0 0.5 to 7.0 0.5 to 7.0 50 50
64 128
r64 r128 65 to 150
qC
Recommended Operating Conditions
Symbol VCC VI IOH IOL TA Supply Voltage Input Voltage HIGH-Level Output Current LOW-Level Output Current Free Air Operating Temperature Input Edge Rate, VIN 0.8V-2.0V, VCC 3.0V A Port B Port A Port B Port Parameter Min 2.7 0 Max 3.6 5.5 Units V V mA mA
32 12
64 12
40
0
85
10
qC
ns/V
't/'V
Note 2: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied. Note 3: IO Absolute Maximum Rating must be observed.
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74LVT2245 * 74LVTH2245
DC Electrical Characteristics
Symbol VIK VIH VIL VOH Parameter Input Clamp Diode Voltage Input HIGH Voltage Input LOW Voltage Output HIGH Voltage A Port B Port VOL Output LOW Voltage A Port VCC (V) 2.7 2.7-3.6 2.7-3.6 2.7 3.0 3.0 2.7-3.6 2.7 3.0 3.0 3.0 B Port II(HOLD) (Note 4) II(OD) (Note 4) II Bushold Input Over-Drive Current to Change State Input Current Control Pins Data Pins IOFF IPU/PD IOZL IOZL (Note 4) IOZH IOZH ICCH ICCL ICCZ ICCZ Power Off Leakage Current Power Up/Down 3-STATE Current 3-STATE Output Leakage Current 3-STATE Output Leakage Current 3-STATE Output Leakage Current 3-STATE Output Leakage Current Power Supply Current Power Supply Current Power Supply Current Power Supply Current Increase in Power Supply Current (Note 7)
Note 4: Applies to Bushold versions only (74LVTH2245). Note 5: An external driver must source at least the specified current to switch from LOW-to-HIGH. Note 6: An external driver must sink at least the specified current to switch from HIGH-to-LOW. Note 7: This is the increase in supply current for each input that is at the specified voltage level rather than VCC or GND.
TA
40qC to 85qC
Max
Min 2.0
Units V V V V V V II
Conditions
1.2
0.8 2.4 2.0 2.0 VCC0.2 0.5 0.4 0.5 0.55 0.8 0.2 75
18 mA
VO d 0.1V or VO t VCC 0.1V IOH IOH IOH IOH IOL IOL IOL IOL IOL IOL VI VI
8 mA 32 mA 12 mA 100 PA
24 mA 16 mA 32 mA 64 mA 12 mA 100 PA 0.8V 2.0V
V
3.0 2.7
V V
Bushold Input Minimum Drive
3.0 3.0 3.6 3.6 3.6 0 0-1.5V 3.6 3.6 3.6 3.6 3.6 3.6 3.6 3.6 3.6 3.6
75
500
PA PA
10
(Note 5) (Note 6) VI 5.5V 0V or VCC 0V VCC 0.5V to 3.0V GND or VCC 0.5V 0.0V 3.0V 3.6V VI VI VI
500 r1 5
1
PA
r100 r100 5 5
5 5 10 0.19 5 0.19 0.19 0.2
PA PA PA PA PA PA PA
mA mA mA mA mA
0V d VI or VO d 5.5V VO VI VO VO VO VO
IOZH (Note 4) 3-STATE Output Leakage Current
VCC VO d 5.5V Outputs High Outputs Low Outputs Disabled VCC d VO d 5.5V, Outputs Disabled One Input at VCC 0.6V Other Inputs at VCC or GND
'ICC
Dynamic Switching Characteristics
Symbol VOLP VOLV Parameter Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL VCC (V) 3.3 3.3
(Note 8)
TA 25qC Typ 0.8 Max Units V V CL Conditions 50 pF, RL (Note 9) (Note 9) 500:
Min
0.8
Note 8: Characterized in SOIC package. Guaranteed parameter, but not tested. Note 9: Max number of outputs defined as (n). n1 data inputs are driven 0V to 3V. Output under test held LOW.
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74LVT2245 * 74LVTH2245
AC Electrical Characteristics
TA Symbol Parameter VCC Min tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ tOSHL tOSLH tOSHL tOSLH A Port Output to Output Skew (Note 10) B Port Output to Output Skew (Note 10) Output Disable Time for A Port Output Output Disable Time for B Port Output Output Enable Time for A Port Output Output Enable Time for B Port Output Propagation Delay Data to A Port Output Propagation Delay Data to B Port Output 1.2 1.2 1.2 1.2 1.3 1.7 1.3 1.7 2.0 2.0 2.0 2.0 CL
40qC to 85qC
50 pF, RL 500: VCC Min 1.2 1.2 1.2 1.2 1.3 1.7 1.3 1.7 2.0 2.0 2.0 2.0 2.7V Max 5.1 5.1 4.0 4.0 7.3 7.3 7.1 6.7 6.5 5.7 6.5 5.1 1.0 1.0 ns ns ns ns ns ns ns ns Units
3.3V r 0.3V Max 4.4 4.4 3.6 3.5 6.2 6.2 5.5 5.7 5.9 5.4 5.9 5.0 1.0 1.0
Note 10: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
Capacitance
Symbol CIN CI/O
(Note 11)
Parameter Conditions VCC VCC 0V, VI 0V or VCC 0V or VCC 3.0V, VO Typical 4 8 Units pF pF
Input Capacitance Input/Output Capacitance
Note 11: Capacitance is measured at frequency f
1 MHz, per MIL-STD-883, Method 3012.
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74LVT2245 * 74LVTH2245
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B
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74LVT2245 * 74LVTH2245
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D
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74LVT2245 * 74LVTH2245
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide Package Number MSA20
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74LVT2245 * 74LVTH2245 Low Voltage Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs and 25: Series Resistors in the B Port Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 9 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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